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CS4207 (Cirrus Logic) : Total 30 Pages

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CS4207
Low-power, 4-in / 6-out HD Audio Codec with Headphone Amp
DIGITAL to ANALOG FEATURES
DAC1 (Headphone)
– 101 dB Dynamic Range (A-wtd)
– -89 dB THD+N
Headphone Amplifier - GND Centered
– Integrated Negative-voltage Regulator
– No DC-blocking Capacitor Required
– 50 mW Power/Channel into 16
DAC2 & DAC3 (Line Outs)
– 110 dB Dynamic Range (A-wtd)
– -94 dB THD+N
– Differential Balanced or Single-ended
Each DAC Supports 32 kHz to 192 kHz Sample
Rates Independently.
Digital Volume Control
– +6.0 dB to -57.5 dB in 0.5 dB Steps
– Zero Cross and/or Soft Ramp Transitions
Independent Support of D0 and D3 Power
States for Each DAC
Fast D3 to D0 Transition
– Audio Playback in Less Than 50 ms
ANALOG to DIGITAL FEATURES
ADC1 & ADC2
– 105 dB Dynamic Range (A-wtd)
– -88 dB THD+N
– Differential Balanced or Single-ended
Inputs
– Analog Programmable Gain Amplifier
(PGA) ±12 dB, 1.0 dB Steps, with Zero
Cross Transitions and Mute
MIC Inputs
– Pre-amplifier with Selectable 0 dB, +10 dB,
+20 dB, and +30 dB Gain Settings
– Programmable, Low-noise MIC Bias Level
Each ADC Supports 8 kHz to 96 kHz Sample
Rates Independently
Additional Digital Attenuation Control
– -13.0 dB to -51.0 dB in 1.0 dB steps
– Zero Cross and/or Soft Ramp Transitions
Digital Interface for Two Dual Digital Mic Inputs
Independent Support of D0 and D3 Power
States for Each ADC
HD Audio
Bus
VL_HD
(1.5 V to 3.3 V)
GPIO
S/PDIF OUT 2
S/PDIF OUT 1
VL_IF
(3.3 V)
S/PDIF IN
D-Mic Clock
D-Mic In
VD
(1.5 V to 1.8 V)
HD
Audio
Interface
GPIO
SPDIF
TX2
SPDIF
TX1
HD Bus
Fs
128Fs Clock
Multiplier
SPDIF
RX
SPDIF
RX SRC
Vol/Mute
Vol/Mute
Vol/Mute
Vol/Boost/
Mute
Vol/Boost/
Mute
SRC &
Multibit 
Modulator
SRC &
Multibit 
Modulator
SRC &
Multibit 
Modulator
Digital
Filter &
SRC
Digital
Filter &
SRC
VA, VA_REF
(3.3 V to 5.0 V)
2-Chnl
DAC1
2-Chnl
DAC2
2-Chnl
DAC3
2-Chnl
ADC1
2-Chnl
ADC2
Jack
Sense
VA_HP
(3.3 V to 5.0 V)
Chrg
Pump
Buck
Chrg
Pump
Invert
+VHP
-VHP
Headphone
Amp - GND
Centered
Left HP Out
Right HP Out
Line +- Left Line Out
Out +- Right Line Out
Line +- Left Line Out
Out +- Right Line Out
PGA
+
- Line/Mic In L
Line/Mic In R
+
PGA
MIC
Bias
+- Mic/Line In L
+- Mic/Line In R
Mic Bias
SENSE_A
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2012
(All Rights Reserved)
AUG '12
DS880F4



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Digital Audio Interface Receiver
Complete EIAJ CP1201, IEC 60958, S/PDIF
Compatible Receiver
32 kHz to 192 kHz Sample Rate Range
Automatic Detection of Compressed Audio
Streams
Integrated Sample Rate Converter
– 128 dB Dynamic Range
– -120 dB THD+N
– Supports Sample Rates up to 192 kHz
– 1:1 Input/Output Sample Rate Ratios
Digital Audio Interface Transmitters
Two Independent EIAJ CP1201, IEC-60958,
S/PDIF Compatible Transmitters
32 kHz to 192 kHz Sample Rate Range
System Features
Very Low D3 Power Dissipation of <7 mW
– Jack Detect Active in D3
– HDA BITCLK Not Required for D3 State
Jack Detect Does Not Require HDA Bus
BITCLK
All Configuration Settings are Preserved in D3
State
Pop/Click Suppression in State Transitions
Detects Wake Event and Generates Power
State Change Request when HDA Bus
Controller is in D3
Variable Power Supplies
– 1.5 V to 1.8 V Digital Core Voltage
– 3.3 V to 5.0 V Analog Core Voltage
– 3.3 V to 5.0 V Headphone Drivers
– 1.5 V to 3.3 V HD Bus Interface Logic
– 3.3 V Interface Logic levels for GPIO,
S/PDIF, and Digital Mic
Individual Power-down Managed
– ADCs, DACs, PGAs, Headphone Driver,
S/PDIF Receiver, and Transmitters
CS4207
General Description
The CS4207 is a highly integrated multi-channel low-
power HD Audio Codec featuring 192 kHz DACs,
96 kHz ADCs, 192 kHz S/PDIF Transmitters and Re-
ceiver, Microphone pre-amp and bias voltage, and a
ground centered Headphone driver. Based on multi-bit,
delta-sigma modulation, it allows infinite sample rate
adjustment between 32 kHz and 192 kHz.
The ADC input path allows control of a number of fea-
tures. The microphone input path includes a selectable
programmable-gain pre-amplifier stage and a low-noise
MIC bias voltage supply. A PGA is available for line and
microphone inputs and provides analog gain with soft
ramp and zero cross transitions. The ADC also features
an additional digital volume attenuator with soft ramp
transitions.
The stereo headphone amplifier is powered from a sep-
arate internally generated positive supply, with an
integrated charge pump providing a negative supply.
This allows a ground-centered analog output with a
wide signal swing and eliminates external DC-blocking
capacitors.
The integrated digital audio interface receiver and trans-
mitters utilize a 24-bit, high-performance, monolithic
CMOS stereo asynchronous sample rate converter to
clock align the PCM samples to/from the S/PDIF inter-
faces. Auto detection of non-PCM encoded data
disables the sample rate conversion to preserve bit ac-
curacy of the data.
In addition to its many features, the CS4207 operates
from a low-voltage analog and digital core, making this
part ideal for portable systems that require low power
consumption in a minimal amount of space.
The CS4207 is available in a 48-pin WQFN package in
both Automotive (-40°C to +105°C) and Commercial
(-40°C to +85°C) grades. The CS4207 Customer Dem-
onstration board is also available for device evaluation
and implementation suggestions. Please refer to “Or-
dering Information” on p 147 for complete ordering
information.
2 DS880F4



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CS4207
TABLE OF CONTENTS
1. PIN DESCRIPTIONS .............................................................................................................................. 8
1.1 CS4207 48-pin QFN Pinout: ............................................................................................................ 8
1.2 Digital I/O Pin Characteristics ........................................................................................................ 10
2. TYPICAL CONNECTION DIAGRAMS ................................................................................................. 11
3. CHARACTERISTICS AND SPECIFICATIONS .................................................................................... 13
RECOMMENDED OPERATING CONDITIONS .................................................................................. 13
ABSOLUTE MAXIMUM RATINGS ...................................................................................................... 13
ANALOG INPUT CHARACTERISTICS (COMMERCIAL - CNZ) ......................................................... 14
ANALOG INPUT CHARACTERISTICS (AUTOMOTIVE - DNZ) ......................................................... 15
ADC DIGITAL FILTER CHARACTERISTICS ...................................................................................... 16
ANALOG OUTPUT CHARACTERISTICS (COMMERCIAL - CNZ) ..................................................... 17
ANALOG OUTPUT CHARACTERISTICS (AUTOMOTIVE - DNZ) ..................................................... 19
COMBINED DAC INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ............................. 21
DC ELECTRICAL CHARACTERISTICS .............................................................................................. 21
DIGITAL MICROPHONE INTERFACE CHARACTERISTICS ............................................................. 22
DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS .................................................... 23
HD AUDIO BUS SPECIFICATIONS & CHARACTERISTICS .............................................................. 23
S/PDIF TRANSMITTER/RECEIVER SPECIFICATIONS & CHARACTERISTICS .............................. 23
POWER CONSUMPTION ................................................................................................................... 24
4. CODEC RESET AND INITIALIZATION ............................................................................................... 25
4.1 Link Reset ...................................................................................................................................... 25
4.2 Function Group Reset .................................................................................................................... 25
4.3 Codec Initialization ......................................................................................................................... 25
4.4 D3 Lower Power State Support ..................................................................................................... 26
4.5 Extended Power States Supported (EPSS) ................................................................................... 26
4.6 Power State Settings Reset (PS-SettingsReset) ........................................................................... 28
4.7 Register Settings Across Resets ................................................................................................... 29
5. PRESENCE DETECTION ..................................................................................................................... 31
5.1 Jack Detection Circuit .................................................................................................................... 31
5.1.1 Presence Detection and Unsolicited Response .................................................................... 31
5.1.2 S/PDIF Receiver Presence Detect ........................................................................................ 32
6. HD AUDIO CODEC SUPPORTED VERBS AND RESPONSES ......................................................... 33
6.1 Software Programming Model ....................................................................................................... 33
6.1.1 Node ID Summary ................................................................................................................. 34
6.1.2 Pin Configuration Register Defaults ...................................................................................... 35
6.2 Root Node (Node ID = 00h) ........................................................................................................... 36
6.2.1 Vendor and Device ID ........................................................................................................... 36
6.2.2 Revision ID ............................................................................................................................ 36
6.2.3 Subordinate Node Count ....................................................................................................... 36
6.3 Audio Function Group (Node ID = 01h) ......................................................................................... 37
6.3.1 Subordinate Node Count ....................................................................................................... 37
6.3.2 Function Group Type ............................................................................................................. 37
6.3.3 Audio Function Group Capabilities ........................................................................................ 37
6.3.4 Supported PCM Size, Rates ................................................................................................. 38
6.3.5 Supported Stream Formats ................................................................................................... 39
6.3.6 Supported Power States ....................................................................................................... 39
6.3.7 GPIO Capabilities .................................................................................................................. 40
6.3.8 Power States ......................................................................................................................... 41
6.3.9 GPIO Data ............................................................................................................................. 42
6.3.10 GPIO Enable Mask .............................................................................................................. 43
6.3.11 GPIO Direction .................................................................................................................... 43
6.3.12 GPIO Sticky Mask ............................................................................................................... 43
DS880F4
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CS4207
6.3.13 Implementation Identification ............................................................................................... 44
6.3.14 Function Reset .................................................................................................................... 44
6.4 DAC1, DAC2, DAC3 Output Converter Widgets (Node ID = 02h, 03h, 04h) ................................. 45
6.4.1 Audio Widget Capabilities ..................................................................................................... 45
6.4.2 Supported PCM Size, Rates ................................................................................................. 46
6.4.3 Supported Stream Formats ................................................................................................... 46
6.4.4 Supported Power States ....................................................................................................... 47
6.4.5 Output Amplifier Capabilities ................................................................................................. 47
6.4.6 Power States ......................................................................................................................... 48
6.4.7 Converter Stream, Channel ................................................................................................... 49
6.4.8 Converter Format .................................................................................................................. 49
6.4.9 Amplifier Gain/Mute ............................................................................................................... 51
6.5 ADC1, ADC2 Input Converter Widgets (Node ID = 05h, 06h) ....................................................... 53
6.5.1 Audio Widget Capabilities ..................................................................................................... 53
6.5.2 Supported PCM Size, Rates ................................................................................................. 54
6.5.3 Supported Stream Formats ................................................................................................... 54
6.5.4 Input Amplifier Capabilities .................................................................................................... 55
6.5.5 Connection List Length .......................................................................................................... 55
6.5.6 Supported Power States ....................................................................................................... 56
6.5.7 ADC1 Connection List Entry .................................................................................................. 56
6.5.8 ADC1 Connection Select Control .......................................................................................... 56
6.5.9 ADC2 Connection List Entry .................................................................................................. 57
6.5.10 ADC2 Connection Select Control ........................................................................................ 57
6.5.11 Power States ....................................................................................................................... 58
6.5.12 Converter Stream, Channel ................................................................................................. 59
6.5.13 Converter Format ................................................................................................................ 59
6.5.14 Amplifier Gain/Mute ............................................................................................................. 61
6.6 S/PDIF Receiver Input Converter Widget (Node ID = 07h) ........................................................... 63
6.6.1 Audio Widget Capabilities ..................................................................................................... 63
6.6.2 Supported PCM Size, Rates ................................................................................................. 64
6.6.3 Supported Stream Formats ................................................................................................... 64
6.6.4 Connection List Length .......................................................................................................... 65
6.6.5 Supported Power States ....................................................................................................... 65
6.6.6 Connection List Entry ............................................................................................................ 65
6.6.7 Power States ......................................................................................................................... 66
6.6.8 Converter Stream, Channel ................................................................................................... 67
6.6.9 Converter Format .................................................................................................................. 67
6.6.10 Digital Converter Control ..................................................................................................... 69
6.7 S/PDIF Transmitter 1, S/PDIF Transmitter 2 Output Converter Widgets (Node ID = 08h, 14h) .... 70
6.7.1 Audio Widget Capabilities ..................................................................................................... 70
6.7.2 Supported PCM Size, Rates ................................................................................................. 71
6.7.3 Supported Stream Formats ................................................................................................... 72
6.7.4 Supported Power States ....................................................................................................... 72
6.7.5 Power States ......................................................................................................................... 72
6.7.6 Converter Stream, Channel ................................................................................................... 74
6.7.7 Converter Format .................................................................................................................. 74
6.7.8 Digital Converter Control ....................................................................................................... 76
6.8 Headphone Pin Widget (Node ID = 09h) ....................................................................................... 78
6.8.1 Audio Widget Capabilities ..................................................................................................... 78
6.8.2 Pin Capabilities ...................................................................................................................... 78
6.8.3 Connection List Length .......................................................................................................... 79
6.8.4 Supported Power States ....................................................................................................... 79
6.8.5 Connection List Entry ............................................................................................................ 80
6.8.6 Power States ......................................................................................................................... 80
4 DS880F4





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