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J110
JFET − General Purpose
N−Channel − Depletion
N−Channel Junction Field Effect Transistors, depletion mode
(Type A) designed for general purpose audio amplifiers, analog
switches and choppers.
Features
N−Channel for Higher Gain
Drain and Source Interchangeable
High AC Input Impedance
High DC Input Resistance
Low RDS(on) < 18 W
Fast Switching td(on) + tr = 8.0 ns (Typ)
Low Noise en = 6.0 nV/Hz @ 10 Hz (Typ)
Pb−Free Packages are Available*
http://onsemi.com
1 DRAIN
3
GATE
2 SOURCE
MARKING
DIAGRAM
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Gate−Source Voltage
Drain −Gate Voltage
Gate Current
Total Device Dissipation
@ TA = 25°C
Derate above 25°C
VGS
VDG
IG
PD
−25 Vdc
−25 Vdc
10 mAdc
310 mW
2.82 mW/°C
Operating Junction Temp Range
TJ 135 °C
Storage Temperature Range
Tstg −65 to +150 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 6
1
CASE 29
J110
TO−92 (TO−226) AYWW G
STYLE 5
G
1
23
J110 = Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
J110
J110G
Package
TO−92
TO−92
(Pb−Free)
Shipping
1000 Units / Box
1000 Units / Box
J110RLRA
TO−92 2000 / Tape & Reel
J110RLRAG
TO−92 2000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
J110/D



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J110
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
STATIC CHARACTERISTICS
Gate −Source Breakdown Voltage
(IG = −1.0 mAdc)
Gate Reverse Current
(VGS = −15 Vdc, VDS = 0)
(VGS = −15 Vdc, VDS = 0, TA = 100°C)
Gate−Source Cutoff Voltage
(VDS = 5.0 Vdc, ID = 1.0 mAdc)
Drain Source On−Resistance
(VDS v 0.1 V, VGS = 0 V)
Zero−Gate−Voltage Drain Current (Note 1)
(VDS = 15 Vdc)
DYNAMIC CHARACTERISTICS
Drain−Gate and Source−Gate On−Capacitance
(VDS = VGS = 0, f = 1.0 MHz)
Drain−Gate Off−Capacitance
Source−Gate Off−Capacitance
1. Pulse Width = 300 ms, Duty Cycle = 3.0%.
(VGS = −10 Vdc, f = 1.0 MHz)
(VGS = −10 Vdc, f = 1.0 MHz)
Symbol
V(BR)GSS
IGSS
VGS(off)
RDS(on)
IDSS
Cdg(on)
+
Csg(on)
Cdg(off)
Csg(off)
Min
−25
−0.5
10
Max
− 3.0
−200
−4.0
18
85
Unit
Vdc
nAdc
Vdc
W
mAdc
pF
− 15 pF
− 15 pF
100 100
80 80
60
VDS = 0 V
5V
40
10 V
20
0
0 −4 −8 −12 −16 −20
VGS, GATE−SOURCE VOLTAGE (VOLTS)
Figure 1. Common Source Input Capacitance
versus Gate−Source Voltage
16
12
RDS(on): VDS 0.1 V
RDS(on): VGS = 0 V
8
4
VGS(off): VDS = 5 V
VGS(off): ID = 1.0 mA
0
0 −1 −2 −3 −4 −5 −6 −7 −8
VGS(off), GATE−SOURCE CUTOFF VOLTAGE (VOLTS)
Figure 3. On−Resistance versus Gate−Source
Cutoff Voltage
60
40 VDS = 0 V
20
5V
0 10 V
0 −4
−8 −12 −16 −20
VGS, GATE−SOURCE VOLTAGE (VOLTS)
Figure 2. Common Source Reverse Feedback
Capacitance versus Gate−Source Voltage
100
90
80
70
60
50
40
30
20
10
0
0
VGS = 0 V
−0.25 V
−0.5 V
−0.75 V
−1 V
−1.25 V
2 4 6 8 10 12 14 16 18
VDS, DRAIN−SOURCE VOLTAGE (VOLTS)
Figure 4. Output Characteristic
VGS(off) = −2.0 V
20
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2



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J110
200
180
160
140
120
100
80
60
40
20
0
0
VGS = 0 V
−0.5 V
−1 V
−1.5 V
−2 V
−2.5 V
2 4 6 8 10 12 14 16 18
VDS, DRAIN−SOURCE VOLTAGE (VOLTS)
Figure 5. Output Characteristic
VGS(off) = −3.0 V
20
300
270
240
210
180
150
120
90
60
30
0
0
VGS = 0 V
−0.5 V
−1 V
−1.5 V
−2 V
−2.5 V
−3 V
2 4 6 8 10 12 14 16 18
VDS, DRAIN−SOURCE VOLTAGE (VOLTS)
Figure 6. Output Characteristic
VGS(off) = −4.0 V
20
400
360
320
280
240
200
160
120
80
40
0
0
VGS = 0 V
−0.5 V
−1 V
−1.5 V
−2 V
−2.5 V
−3 V
−3.5 V
2 4 6 8 10 12 14 16 18
VDS, DRAIN−SOURCE VOLTAGE (VOLTS)
Figure 7. Output Characteristic
VGS(off) = −5.0 V
20
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3



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J110
PACKAGE DIMENSIONS
TO−92 (TO−226)
CASE 29−11
ISSUE AL
A
R
SEATING
PLANE
B
P
L
K
XX
H
V
G
C
1
N
N
D
J
SECTION X−X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
INCHES
DIM MIN MAX
A 0.175 0.205
B 0.170 0.210
C 0.125 0.165
D 0.016 0.021
G 0.045 0.055
H 0.095 0.105
J 0.015 0.020
K 0.500 −−−
L 0.250 −−−
N 0.080 0.105
P −−− 0.100
R 0.115 −−−
V 0.135 −−−
STYLE 5:
PIN 1.
2.
3.
DRAIN
SOURCE
GATE
MILLIMETERS
MIN MAX
4.45 5.20
4.32 5.33
3.18 4.19
0.407 0.533
1.15 1.39
2.42 2.66
0.39 0.50
12.70 −−−
6.35 −−−
2.04 2.66
−−− 2.54
2.93 −−−
3.43 −−−
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
4
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
J110/D






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