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ADS117 (Datel) : Total 6 Pages

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®
FEATURES
12-bit resolution
No missing codes
2MHz minimum throughput
Functionally complete
Small 24-pin DDIP
Low-power, 1.6 Watts
Three-state output buffers
Samples to Nyquist frequencies
GENERAL DESCRIPTION
DATEL's ADS-117 is a functionally complete, 12-bit, 2MHz,
sampling A/D converter. Its standard, 24-pin, double-width
DIP contains a fast-settling sample-hold amplifier, a 12-bit
subranging (two-step) A/D converter, a precision reference,
three-state output register and all the timing and control logic
necessary to operate from a single start convert pulse. Digital
input and output levels are TTL.
Total harmonic distortion (THD) and signal-to-noise ratio
(including distortion) typically run –78dB and 70dB,
respectively, with full scale inputs up to 100kHz. The ADS-
117 requires ±15V and +5V power supplies and typically
consumes 1.6 Watts. Models are available for use in either
commercial (0 to +70°C) or military (–55 to +125°C) operating
temperature ranges.
ADS-117
12-Bit, 2MHz, Low-Power
Sampling A/D Converters
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION
PIN FUNCTION
1 BIT 12 (LSB)
2 BIT 11
3 BIT 10
4 BIT 9
5 BIT 8
6 BIT 7
7 BIT 6
8 BIT 5
9 BIT 4
10 BIT 3
11 BIT 2
12 BIT 1 (MSB)
24 –15V SUPPLY
23 ANALOG GROUND
22 +15V SUPPLY
21 +10V REFERENCE
20 BIPOLAR
19 ANALOG INPUT
18 COMP BIN
17 ENABLE (1-12)
16 START CONVERT
15 EOC
14 DIGITAL GROUND
13 +5V SUPPLY
+10V REF. 21
BIPOLAR 20
ANALOG INPUT 19
REF
S2
FLASH
S/H ADC
S1
BUFFER
+
DAC
17 ENABLE (1-12)
12 BIT 1 (MSB)
11 BIT 2
10 BIT 3
9 BIT 4
8 BIT 5
7 BIT 6
6 BIT 7
5 BIT 8
4 BIT 9
3 BIT 10
2 BIT 11
1 BIT 12 (LSB)
COMP BIN 18
START CONVERT 16
EOC 15
TIMING AND
CONTROL LOGIC
13
+5V SUPPLY
14
DIGITAL GROUND
22
+15V SUPPLY
23
ANALOG GROUND
Figure 1. ADS-117 Functional Block Diagram
24
–15V SUPPLY
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) Tel: (508) 339-3000 Fax: (508) 339-6356 For immediate assistance: (800) 233-2765



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ADS-117
®®
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
UNITS
+15V Supply (Pin 22)
–15V Supply (Pin 24)
+5V Supply (Pin 13)
Digital Inputs (Pin 16, 17, 18)
Analog Input (Pin 19)
Lead Temp. (10 seconds)
0 to +16
0 to –16
0 to +6.0
–0.3 to +VDD +0.3
–9 to +15
+300
Volts
Volts
Volts
Volts
Volts
°C
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±VCC = +15V, +VDD =+5V, 2MHz sampling rate, and a minimum 3 minute
warmup unless otherwise specified.)
ANALOG INPUTS
MIN. TYP. MAX. UNITS
Input Voltage Range
Bipolar
Unipolar
Input Impedence
Input Capacitance
DIGITAL INPUTS
— ±5 —
— 0 to +10 —
4.5 5 —
— 6 15
Volts
Volts
k
pF
Logic Levels
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
PERFORMANCE
+2.0 — — Volts
— — +0.8 Volts
— — +5 µA
— — –600 µA
Resolution
No Missing Codes
(12 Bits; fin = 1MHz)
Integral Non-Linearity
0°C to +70°C
–55°C to +125°C
Differential Non-Linearity
0°C to +70°C
–55°C to +125°C
Full Scale Absolute Accuracy
(see Tech Note 1)
0°C to +70°C
–55°C to +125°C
Unipolar/Bipolar Zero Error
0°C to +70°C (see Tech Note 1)
–55°C to +125°C
Bipolar Offset Error
0°C to +70°C (see Tech Note 1)
–55°C to +125°C
Gain Error (see Tech Note 1)
0°C to +70°C
–55°C to +125°C
Internal Reference Voltage
0°C to +70°C
–55°C to +125°C
External Current
DYNAMIC PERFORMANCE
+9.97
+9.95
12 Bits
0 to +70°C
±1/2 ±3
±1 ±4
±1/2 ±0.95
±1 +1.5
LSB
LSB
LSB
LSB
±0.13
±0.25
±0.07
±0.22
±0.1
±0.53
±0.1
±0.53
+10.0
±0.44
±0.73
±0.38
±0.73
±0.38
±0.73
±0.38
±0.73
+10.03
+10.05
1.5
%FSR
%FSR
%FSR
%FSR
%FSR
%FSR
%
%
Volts
Volts
mA
Spurious Free Dynamic
Range (–0.5dB)
dc to 100kHz
100kHz to 500kHz
500kHz to 1MHz
Total Harm. Distort. (–0.5dB)
dc to 100kHz
100kHz to 500kHz
500kHz to 1MHz
Input Bandwith (–3dB)
Small Signal (–20dB input)
Large Signal (–0.5dB input)
Feedthrough (1MHz)
8
7
–72
See Table 1 also
Same specifications for in-band harmonics.
–81 —
–75 –70
–70 —
dB
dB
dB
–78 —
–73 –68
–71 —
dB
dB
dB
10 — MHz
9 — MHz
–74 —
dB
DYNAMIC PERF. (cont)
MIN. TYP. MAX. UNITS
SNR (wo/distortion, –0.5dB)
dc to 100kHz
0°C to +70°C
–55°C to +125°C
100kHz to 500kHz
0°C to +70°C
–55°C to +125°C
500kHz to 1MHz
0°C to +70°C
–55°C to +125°C
SNR (and distort., –0.5dB)
dc to 100kHz
0°C to +70°C
–55°C to +125°C
100kHz to 500kHz
0°C to +70°C
–55°C to +125°C
500kHz to 1MHz
0°C to +70°C
–55°C to +125°C
Two-tone Intermodulation
Distortion (fin = 970kHz,
990kHz, fs = 2Mhz,
–0.5dB)
Slew Rate
Effect. Aperture Delay Time
Overvoltage Recovery
Time; 20%
S/H Acq. Time, (to ±0.01%)
0 to +70°C
–55°C to +125°C
Conversion Rate
OUTPUTS
— 72 — dB
— 72 — dB
65 70 — dB
65 70 — dB
— 70 — dB
— 70 — dB
— 70 — dB
— 69 — dB
64 70 — dB
62 69 — dB
— 69 — dB
— 69 — dB
— –68 — dB
— ±210 — V/µs
— — 16 ns
— — 500 ns
155 165
ns
160 170
ns
2 — — MHz
Output Coding
Pin 18 High
Pin 18 Low
Logic Level
Logic "1"
Logic "0"
Logic Loading "1"
Logic Loading "0"
POWER REQUIREMENTS
Staight binary/Offset binary
Complementary binary
Complementary offset binary
+2.4 — — Volts
— — +0.4 Volts
— — –160 µA
— — +6.4 mA
Power Supply Ranges
+15V Supply
–15V Supply
+5V Supply
Power Supply Current
+15V Supply
–15V Supply
+5V Supply
Power Dissipation
Power Supply Rejection
+14.25
–14.25
+4.75
PHYSICAL/ENVIRONMENTAL
+15.0
–15.0
+5.0
+48
–35
+75
1.6
+15.75
–15.75
+5.25
Volts
Volts
Volts
+58
–45
+85
1.9
±0.07
mA
mA
mA
Watts
%FSR%V
Operating Temp. Range, Case
ADS-117MC
ADS-117MM, 883
Storage Temperature Range
Thermal Impedance
θjc
θca
Package Type
Weight
0 — +70 °C
–55 — +125 °C
–65 — +150 °C
— 3 — °C/W
— 23 — °C/W
24-pin, metal-sealed, ceramic DDIP
0.42 ounces (12 grams)
Effective bits is equal to:
Full Scale Amplitude
(SNR + Distortion) – 1.76 + 20 log Actual Input Amplitude
6.02
For ±12V, +5V operation, contact DATEL
2



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ADS-117
TECHNICAL NOTES
1. Applications which are unaffected by endpoint errors or
remove them through software will use the typical connec-
tions shown in Figure 3. Remove system errors or adjust
the small initial errors of the ADS-117 to zero using the
optional external circuitry shown in Figure 4. The external
adjustment circuit has no effect on the throughput rate.
2. Always connect the analog and digital grounds to a ground
plane beneath the converter for best performance. The
analog and digital grounds are not connected to each other
internally.
3. Bypass the analog and digital supplies and the +10V
reference (pin 21) to ground with 4.7µF, 25V tantalum
electrolytic capacitors in parallel with 0.1µF ceramic
capacitors. Bypass the +10V reference (pin 21) to
ANALOG GROUND (pin 23).
4. Obtain straight binary/offset binary output coding by tying
COMP BIN (pin 18) to +5V or leaving it open. The device
has an internal pull-up resistor on this pin. To obtain
complementary binary or complementary offset binary
output coding, tie pin 18 to ground. The pin 18 signal is
compatible with CMOS/TTL logic levels for those users
desiring dynamic control of this function. Do not change
COMP BIN status while EOC is high.
5. To enable the three-state outputs, connect ENABLE (pin
17) to a logic "0" (low). To disable, connect pin 17 to a logic
"1" (high).
6. To meet the guaranteed conversion rate, a maximum start
convert pulse is specified. A wider start convert pulse will
result in slower conversion rates. An initial start convert
pulse is required before performing an actual conversion
after power-up to assure the sample-hold is in the acquisi-
tion mode.
Figure 2 shows the relationship between the various input
signals. The timing shown applies over the operating
temperature range and over the operating power supply
range.
7. Re-initiating the START CONVERT (pin 16) while EOC is a
logic "1" (high) will result in a new conversion sequence.
START
CONVERT
INTERNAL S/H
EOC
N N+1
50ns typ.,
30ns min., 60ns max.
10ns min.
25ns max.
Hold
Acquisition Time
165ns typ.
170ns max.
10ns min.
17ns max.
Conversion Time
325ns typ.
60ns max.
OUTPUT
DATA
DATA N-1 VALID
350ns min.
INVALID
DATA
150ns max.
Note: Scale is approximately 25ns per division.
35ns max.
DATA N VALID
Figure 2. ADS-117 Timing Diagram
INVALID
DATA
3



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ADS-117
CALIBRATION PROCEDURE
1. Connect the converter per Figure 3, Figure 4, and Table 1
for the appropriate input range. Apply a pulse of 150
nanoseconds to the START CONVERT input (pin 16) at a
rate of 250kHz. This rate is chosen to reduce flicker if
LED’s are used on the outputs for calibration purposes.
2. Zero Adjustments
Apply a precision voltage reference source between the
amplifier’s analog input and ground. Adjust the output of the
reference source per Table 2. For unipolar, adjust the zero
trimming potentiometer so that the output code flickers
equally between 0000 0000 0000 and 0000 0000 0001 with
the pin 18 tied high (straight binary) or between 1111 1111
1111 and 1111 1111 1110 with the pin 18 tied low (comple-
mentary binary).
For bipolar operation, adjust the potentiometer such that
the code flickers equally between 1000 0000 0000 and
1000 0000 0001 with pin 18 tied high (offset binary) or
between 0111 1111 1111 and 0111 1111 1110 with pin 18
tied low (complementary offset binary).
3. Full-Scale Adjustment
Set the output of the voltage reference used in step 2 to the
value shown in Table 1. Adjust the gain trimming potentiom-
eter so that the output code flickers equally between 1111
1111 1110 and 1111 1111 1111 for pin 18 tied high or
between 0000 0000 0001 and 0000 0000 0000 for pin 18
tied low.
4. To confirm proper operation of the device, vary the preci-
sion reference voltage source to obtain the output coding
listed in Table 3.
®®
R2
R1
SIGNAL
INPUT
5k
50
GAIN
ADJUST
+15V
–15V
To Pin19
of ADS-117
5k
10k
ZERO/
OFFSET
ADJUST
For values of R1 and R2 refer to Table 1.
Figure 4. Optional Calibration Circuit
Table 1. Input Connections (using external calibration)
INPUT RANGE
0 +10V, ±5
0 to 5V, ±2.5V
0 to +2.5V, ±1.25V
R1 R2
22
26
2 14
UNIT
k
k
k
Table 2. Zero and Gain Adjustments
Input
Range
Zero Adjust
+1/2 LSB
Gain Adjust
+FS – 1 1/2 LSB
0 to +10V
±5V
+1.22mV
+1.22mV
+9.9963V
+4.9963V
UNIPOLAR
OPERATION
20 BIPOLAR INPUT
+
0.1µF 4.7µF
21 +10V REF.
–15V
4.7µF
+
0.1µF
4.7µF
+ 0.1µF
+15V
+5V
+
4.7µF
0.1µF
24
23
22
13
14
ADS-117
COMP BIN 18
12 BIT 1 (MSB)
11 BIT 2
10 BIT 3
9 BIT 4
8 BIT 5
7 BIT 6
6 BIT 7
5 BIT 8
4 BIT 9
3 BIT 10
2 BIT 11
1 BIT 12 (LSB)
15 EOC
17 ENABLE (1-12)
16 START CONVERT
19 ANALOG INPUT
+5V
NOTE: For unipolar operation, ground pin 20.
For bipolar operation, connect pin 20 to pin 21.
Always bypass pin 21 as shown for both unipolar
and bipolar operation.
Figure 3. ADS-117 Connection Diagram
4





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