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87C196KC (Intel Corporation) : Total 21 Pages

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87C196KC
16-BIT HIGH-PERFORMANCE CHMOS
MICROCONTROLLER
Automotive
Y b40 C to a125 C
Y 16 Kbytes of On-Chip EPROM
Y 232 Byte Register File
Y Full Duplex Serial Port
Y High-Speed I O Subsystem
Y 16-Bit Timer
Y 256 Bytes of Additional RAM
Y 16-Bit Up Down Counter with Capture
Y Register-to-Register Architecture
Y 3 Pulse-Width-Modulated Outputs
Y 28 Interrupt Sources 16 Vectors
Y Four 16-Bit Software Timers
Y Peripheral Transaction Server
Y 1 75 ms 16 x 16 Multiply (16 MHz)
Y 3 0 ms 32 16 Divide (16 MHz)
Y Powerdown and Idle Modes
Y Five 8-Bit I O Ports
Y 16-Bit Watchdog Timer
Y Dynamically Configurable 8-Bit or
16-Bit Buswidth
Y 8- or 10-Bit 8-Channel A D Converter
with Sample Hold
Y HOLD HLDA Bus Protocol
Y OTP One-Time Programmable and
QROM Versions
Y Available in 12 MHz and 16 MHz
Versions
Y 16 MHz Operation
The 87C196KC 16-bit microcontroller is a high-performance member of the MCS 96 microcontroller family
The 87C196KC is an enhanced 8XC196KB device with 488 bytes RAM 16 MHz operation and 16 Kbytes of
on-chip EPROM Intel’s CHMOS process provides a high performance processor along with low power con-
sumption
Four high-speed capture inputs are provided to record times when events occur Six high-speed outputs are
available for pulse or waveform generation The high-speed output can also generate four software timers or
start an A D conversion Events can be based on the timer or up down counter
NOTICE
This datasheet contains information on products in full production Specifications within this datasheet
are subject to change without notice Verify with your local Intel sales office that you have the latest
datasheet before finalizing a design
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT INTEL CORPORATION 1995
January 1995
Order Number 270846-004



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AUTOMOTIVE 87C196KC
Figure 1 87C196KC Block Diagram
270846 – 1
270846 – 33
Figure 2 The 87C196KC Family Nomenclature
87C196KC Enhanced Feature Set over the 87C196KB
1 The 87C196KC has twice the RAM and twice the EPROM of the 87C196KB Also a Vertical Register
Windowing Scheme allows the extra 256 bytes of RAM to be used as registers This greatly reduces the
context switching time
2 Peripheral Transaction Server (PTS) The PTS is an alternative way to service an interrupt reducing latency
and overhead Each interrupt can be mapped to its PTS channel which acts like a DMA channel Each
interrupt can now do a single or block transfer without executing an Interrupt service routine Special PTS
modes exist for the A D converter HSI and HSO
3 Two extra Pulse Width Modulated outputs The 87C196KC has added 2 PWM outputs that are functionally
compatible to the 87C196KB PWM
4 Timer2 Internal Clocking Timer2 can now be clocked with an internal source every 1 or 8 state times
5 The A D can now perform an 8- as well as a 10-bit conversion 8-bit conversion allows for a faster
conversion time
6 Additional On-chip Memory Security Two UPROM (Uneraseable Programmable Read Only Memory) bits
can be programmed to disable the bus controller for external code and data fetches Once programmed a
UPROM bit cannot be erased By shutting off the bus controller for external fetches no one can try and
gain access to your code by executing from external memory
7 New Instructions The 87C196KC has 5 new instructions An exchange (XCHB XCHW) instruction swaps
two memory locations an Interruptable Block Move Instruction (BMOVI) a Table Indirect Jump (TIJMP)
instruction and two instructions for enabling and disabling the PTS (EPTS DPTS)
2



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AUTOMOTIVE 87C196KC
PACKAGING
PLCC
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
60
59
58
57
56
55
Description
ACH7 P0 7
ACH6 P0 6
ACH2 P0 2
ACH0 P0 0
ACH1 P0 1
ACH3 P0 3
NMI
EA
VCC
VSS
XTAL1
XTAL2
CLKOUT
BUSWIDTH
INST
ALE ADV
RD
AD0 P3 0
AD1 P3 1
AD2 P3 2
AD3 P3 3
AD4 P3 4
AD5 P3 5
PLCC
Description
PLCC
54 AD6 P3 6
31
53 AD7 P3 7
30
52 AD8 P4 0
29
51 AD9 P4 1
28
50 AD10 P4 2
27
49 AD11 P4 3
26
48 AD12 P4 4
25
47 AD13 P4 5
24
46 AD14 P4 6
23
45 AD15 P4 7
22
44 T2CLK P2 3
21
43 READY
20
42 T2RST P2 4
19
41 BHE WRH
18
40 WR WRL
17
39 PWM0 P2 5
16
38 P2 7 T2CAPTURE 15
37 VPP
36 VSS
35 HSO 3
14
13
12
34 HSO 2
11
33 P2 6 T2UP-DN
10
32 P1 7 HOLD
Figure 3 68-Pin PLCC Functional Pin-out
Description
P1 6 HLDA
P1 5 BREQ
HSO 1
HSO 0
HSO 5 HSI 3
HSO 4 HSI 2
HSI 1
HSI 0
P1 4 PWM2
P1 3 PWM1
P1 2
P1 1
P1 0
TXD P2 0
RXD P2 1
RESET
EXTINT P2 2
VSS
VREF
ANGND
ACH4 P 04
ACH5 P 05
3



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AUTOMOTIVE 87C196KC
Figure 4 68-Pin PLCC Package
Table 1 Prefix Identification
PLCC
87C196KC
OTP Version
AN87C196KC
270846 – 2
4






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