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ALC5672 (Realtek Microelectronics) : Total 30 Pages

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ALC5672
Multi-Channel Audio Hub/CODEC with Gen.3
Voice DSP and SounzRealTM Post-Processing
for Mobile Devices
Datasheet
Rev. 0.71
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com



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ALC5672
Datasheet
COPYRIGHT
© 2013 Realtek Semiconductor Corp. All rights reserved. No part of this document may be
reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any
language in any form or by any means without the written permission of Realtek Semiconductor
Corp.
DISCLAIMER
Realtek provides this document “as is”, without warranty of any kind. Realtek may make
improvements and/or changes in this document or in the product described in this document at
any time. This document could include technical inaccuracies or typographical errors.
TRADEMARKS
Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this
document are trademarks/registered trademarks of their respective owners.
USING THIS DOCUMENT
This document is intended for the hardware and software engineer’s general information on the
Realtek ALC5672 Audio Codec IC.
Though every effort has been made to ensure that this document is current and accurate, more
information may have become available subsequent to the production of this guide.
ii Rev. 0.71



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REVISION HISTORY
Revision
Release Date
0.4 2012/12/28
0.5 2013/1/28
0.6 2013/3/4
0.7 2013/3/21
0.71 2013/4/15
Summary
First full version release
Modify register typos
Modify order information
Modify clock rate supporting for TDM interface
Modify application circuit
Modify typos
Modify application circuit
Modify IN2P pin share function
ALC5672
Datasheet
iii Rev. 0.71



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ALC5672
Datasheet
Table of Contents
1. GENERAL DESCRIPTION ..............................................................................................................................................1
2. FEATURES.........................................................................................................................................................................2
3. POWER/GROUND OPERATION CONDITIONS..........................................................................................................3
4. SYSTEM APPLICATION..................................................................................................................................................4
5. FUNCTION BLOCK AND MIXER PATH .......................................................................................................................5
5.1. FUNCTION BLOCK........................................................................................................................................................5
5.2. AUDIO MIXER PATH.....................................................................................................................................................6
5.3. DIGITAL MIXER PATH ..................................................................................................................................................7
6. PIN ASSIGNMENTS .........................................................................................................................................................8
7. PIN DESCRIPTIONS.........................................................................................................................................................9
7.1. DIGITAL I/O PINS.........................................................................................................................................................9
7.2. ANALOG I/O PINS......................................................................................................................................................10
7.3. FILTER/REFERENCE..................................................................................................................................................11
7.4. POWER/GROUND ......................................................................................................................................................12
8. FUNCTION DESCRIPTION ...........................................................................................................................................13
8.1. SYSTEM CONNECTION ..............................................................................................................................................13
8.2. POWER ......................................................................................................................................................................14
8.3. POWER SUPPLY ON/OFF SEQUENCE.......................................................................................................................15
8.4. RESET .......................................................................................................................................................................17
8.4.1. Power-On Reset (POR) ...............................................................................................................................17
8.4.2. Software Reset ..............................................................................................................................................17
8.5. CLOCKING .................................................................................................................................................................18
8.5.1.
8.5.2.
Phase-Locked Loop......................................................................................................................................19
I2C and Two I2S/PCM Interface...................................................................................................................20
8.6. DIGITAL DATA INTERFACE.........................................................................................................................................23
8.6.1. Two I2S/PCM Interface.................................................................................................................................23
8.7. AUDIO DATA PATH ....................................................................................................................................................27
8.7.1. 2 Analog ADCs with 6-Channel Record Path ...........................................................................................27
8.7.2. 4 DACs with 4-Channel Playback Path .....................................................................................................28
8.7.3. Mixers .............................................................................................................................................................29
8.8. ANALOG AUDIO INPUT PORT ....................................................................................................................................30
8.9. ANALOG AUDIO OUTPUT PORT.................................................................................................................................31
8.10. MULTI-FUNCTION PINS .............................................................................................................................................33
8.11. DRC AND AGC FUNCTION .......................................................................................................................................35
8.12. SOUNZREALTM POST-PROCESSING .........................................................................................................................38
8.13. EQUALIZER BLOCK....................................................................................................................................................38
8.14. WIND NOISE REDUCTION FILTER .............................................................................................................................38
8.15. I2C CONTROL INTERFACE .........................................................................................................................................41
8.15.1. Address Setting .............................................................................................................................................41
8.15.2. Complete Data Transfer...............................................................................................................................41
8.16. GPIO, INTERRUPT AND JACK DETECTION................................................................................................................43
8.17. POWER MANAGEMENT..............................................................................................................................................46
8.18. GEN.3 VOICE DSP FUNCTION..................................................................................................................................47
iv Rev. 0.71





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